ATA-Cache: Contention Mitigation for GPU Shared L1 Cache with Aggregated Tag Array

TL;DR

This paper proposes ATA-Cache, a GPU shared L1 cache architecture with an aggregated tag array that reduces contention and improves performance by leveraging inter-core data locality.

Contribution

It introduces an aggregated tag array design that decouples and combines multiple L1 cache tags to minimize contention and enhance cache efficiency.

Findings

GPU IPC improved by 12% on average for high locality applications.

Contention is reduced by parallel tag comparison across caches.

Filtering unnecessary cache accesses decreases resource contention.

Abstract

GPU shared L1 cache is a promising architecture while still suffering from high resource contentions. We present a GPU shared L1 cache architecture with an aggregated tag array that minimizes the L1 cache contentions and takes full advantage of inter-core locality. The key idea is to decouple and aggregate the tag arrays of multiple L1 caches so that the cache requests can be compared with all tag arrays in parallel to probe the replicated data in other caches. The GPU caches are only accessed by other GPU cores when replicated data exists, filtering out unnecessary cache accesses that cause high resource contentions. The experimental results show that GPU IPC can be improved by 12% on average for applications with a high inter-core locality.