A New 22 nm ULPLS Architecture to Detect 70 mV Minimum Input, Suitable for IOT Applications

TL;DR

This paper introduces a novel ultra low power level shifter in 22 nm technology capable of detecting input signals as low as 70 mV, suitable for energy-efficient IoT applications.

Contribution

A new ULPLS architecture with enhanced robustness and ultra low power consumption designed for sub-threshold voltage sensing in IoT devices.

Findings

Power dissipation of ~22.84 nW

Detects input signals as low as 70 mV

Validated through worst case and Monte Carlo analyses

Abstract

Modern applications such as energy harvesting, signal monitoring in bio-medical sensing, portable point of care devices, etc. which involve state of the art mixed signal subsystems require robust ultra low power operation. Here in this work, a novel ultra low power level shifter (ULPLS) is proposed for sensing voltage signals in sub-threshold region. The proposed architecture is implemented in 22 nm technology using a dual power supply. The high and low supply voltages (VddH & VddL) are set as 0.8 V and 0.4 V respectively. The key design features of ULPLS include a current limiting PMOS diode, a voltage divider, and an enhanced pull up network. The ULPLS exhibits a low power dissipation of ~ 22.84 nW with a minimum ~ 70 mV detection of input signal. The robustness of the design has been examined via worst case and Monte Carlo analyses.