Chemical Mechanical Planarization for Ta-based Superconducting Quantum Devices
Ekta Bhatia, Soumen Kar, Jakub Nalaskowski, Tuan Vo, Stephen Olson,, Hunter Frost, John Mucci, Brian Martinick, Pui Yee Hung, Ilyssa Wells, Sandra, Schujman, Satyavolu S. Papa Rao

TL;DR
This paper presents a CMP process for thick tantalum structures with 100 nm features, enabling scalable superconducting circuits on 300 mm wafers with precise patterning and electrical performance.
Contribution
The work introduces a CMP process tailored for tantalum-based superconducting device fabrication, including design rules and process integration for 300 mm wafer scale production.
Findings
Achieved local topography less than 5 nm across wafers.
Confirmed low leakage and consistent sheet resistance in Ta structures.
Demonstrated reproducibility and process control for Ta CMP.
Abstract
We report on the development of a chemical mechanical planarization (CMP) process for thick damascene Ta structures with pattern feature sizes down to 100 nm. This CMP process is the core of the fabrication sequence for scalable superconducting integrated circuits at 300 mm wafer scale. This work has established the elements of the various CMP-related design rules that can be followed by a designer for the layout of circuits that include Ta-based coplanar waveguide resonators, capacitors, and interconnects for tantalum-based qubits and single flux quantum (SFQ) circuits. The fabrication of these structures utilizes 193 nm optical lithography, along with 300 mm process tools for dielectric deposition, reactive ion etch, wet-clean, CMP and in-line metrology, all tools typical for a 300 mm wafer CMOS foundry. Process development was guided by measurements of physical and electrical…
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Taxonomy
TopicsSemiconductor materials and devices · Advanced Surface Polishing Techniques · Copper Interconnects and Reliability
