Modeling of parallel power MOSFETs in steady-state

TL;DR

This paper introduces a model for parallel power MOSFETs that captures their behavior from turnoff to steady state, helping to understand and manage current sharing and power loss asymmetries.

Contribution

It presents a novel model describing the relationship between gate voltage and current distribution in parallel MOSFETs during steady state.

Findings

Model accurately predicts current sharing among parallel MOSFETs.

Helps in analyzing power loss asymmetries.

Applicable for high-power switching applications.

Abstract

In high-power applications, multiple power MOSFETs are connected in parallel and treated as a single switch in order to handle much larger total currents. In this paper, a parallel power MOSFETs model from the turnoff state until they reach their steady state is introduced. The model represents the relationship between each power MOSFET's gate voltage and the current distribution among them. The study's key purpose is to use the model for dealing with the asymmetry in sharing current and power loss between these semiconductor devices during the steady state region.