Firmware implementation of a recurrent neural network for the computation of the energy deposited in the liquid argon calorimeter of the ATLAS experiment

TL;DR

This paper presents a firmware implementation of a recurrent neural network on FPGA hardware to accurately and efficiently compute energy deposits in the ATLAS liquid argon calorimeter, improving speed and resource use.

Contribution

It introduces a VHDL-optimized FPGA implementation of an RNN for calorimeter energy reconstruction, surpassing high-level synthesis performance constraints.

Findings

Achieved processing of 384 channels per FPGA

Latency reduced to under 125 nanoseconds

Demonstrated neural network outperforming traditional algorithms

Abstract

The ATLAS experiment measures the properties of particles that are products of proton-proton collisions at the LHC. The ATLAS detector will undergo a major upgrade before the high luminosity phase of the LHC. The ATLAS liquid argon calorimeter measures the energy of particles interacting electromagnetically in the detector. The readout electronics of this calorimeter will be replaced during the aforementioned ATLAS upgrade. The new electronic boards will be based on state-of-the-art field-programmable gate arrays (FPGA) from Intel allowing the implementation of neural networks embedded in firmware. Neural networks have been shown to outperform the current optimal filtering algorithms used to compute the energy deposited in the calorimeter. This article presents the implementation of a recurrent neural network (RNN) allowing the reconstruction of the energy deposited in the calorimeter on Stratix 10 FPGAs. The implementation in high level synthesis (HLS) language allowed fast prototyping but fell short of meeting the stringent requirements in terms of resource usage and latency. Further optimisations in Very High-Speed Integrated Circuit Hardware Description Language (VHDL) allowed fulfilment of the requirements of processing 384 channels per FPGA with a latency smaller than 125 ns.