RRNet: Towards ReLU-Reduced Neural Network for Two-party Computation Based Private Inference

TL;DR

RRNet is a novel framework that reduces computational overhead in privacy-preserving deep learning by integrating cryptographic considerations into neural network design and leveraging FPGA hardware acceleration.

Contribution

It introduces a ReLU reduction method combined with hardware-aware training and FPGA-based scheduling to improve efficiency in secure two-party computation for deep learning.

Findings

Achieved higher ReLU reduction performance than state-of-the-art methods on CIFAR-10.

Improved energy efficiency, accuracy, and security in privacy-preserving neural networks.

Demonstrated effective FPGA-based acceleration for cryptographic operations.

Abstract

The proliferation of deep learning (DL) has led to the emergence of privacy and security concerns. To address these issues, secure Two-party computation (2PC) has been proposed as a means of enabling privacy-preserving DL computation. However, in practice, 2PC methods often incur high computation and communication overhead, which can impede their use in large-scale systems. To address this challenge, we introduce RRNet, a systematic framework that aims to jointly reduce the overhead of MPC comparison protocols and accelerate computation through hardware acceleration. Our approach integrates the hardware latency of cryptographic building blocks into the DNN loss function, resulting in improved energy efficiency, accuracy, and security guarantees. Furthermore, we propose a cryptographic hardware scheduler and corresponding performance model for Field Programmable Gate Arrays (FPGAs) to further enhance the efficiency of our framework. Experiments show RRNet achieved a much higher ReLU reduction performance than all SOTA works on CIFAR-10 dataset.