Efficient Constrained Codes That Enable Page Separation in Modern Flash Memories

TL;DR

This paper introduces low-complexity, capacity-approaching constrained coding schemes for Flash memories that enable page separation, improving access speed while maintaining reliability by coding only on specific pages.

Contribution

The paper proposes novel systematic constrained coding schemes, called read-and-run (RR), that enable page separation in Flash memories with minimal redundancy and complexity.

Findings

RR coding schemes approach capacity

They reduce error-prone pattern occurrence

Performance improvements shown on practical Flash device

Abstract

The pivotal storage density win achieved by solid-state devices over magnetic devices recently is a result of multiple innovations in physics, architecture, and signal processing. Constrained coding is used in Flash devices to increase reliability via mitigating inter-cell interference. Recently, capacity-achieving constrained codes were introduced to serve that purpose. While these codes result in minimal redundancy, they result in non-negligible complexity increase and access speed limitation since pages cannot be read separately. In this paper, we suggest new constrained coding schemes that have low-complexity and preserve the desirable high access speed in modern Flash devices. The idea is to eliminate error-prone patterns by coding data either only on the left-most page (binary coding) or only on the two left-most pages ($4$-ary coding) while leaving data on all the remaining pages uncoded. Our coding schemes are systematic and capacity-approaching. We refer to the proposed schemes as read-and-run (RR) constrained coding schemes. The $4$-ary RR coding scheme is introduced to limit the rate loss. We analyze the new RR coding schemes and discuss their impact on the probability of occurrence of different charge levels. We also demonstrate the performance improvement achieved via RR coding on a practical triple-level cell Flash device.