Tuning the Interlayer Microstructure and Residual Stress of Buffer-Free Direct Bonding GaN/Si Heterostructures

TL;DR

This paper demonstrates a buffer-free GaN/Si heterostructure fabricated at room temperature using surface activated bonding, with tunable interfacial microstructure and residual stress, advancing integration of GaN with silicon CMOS technology.

Contribution

It introduces a buffer-free GaN/Si bonding method at room temperature and shows how thermal annealing can tune interfacial microstructure and stress states.

Findings

Relaxed and uniform tensile stress in GaN layers bonded to Si.

Interfacial microstructure and stress can be tuned by thermal annealing.

Successful fabrication of high-quality GaN/Si heterostructures without buffer layers.

Abstract

The direct integration of GaN with Si can boost great potential for low-cost, large-scale, and high-power device applications. However, it is still challengeable to directly grow GaN on Si without using thick strain relief buffer layers due to their large lattice and thermal-expansion-coefficient mismatches. In this work, a GaN/Si heterointerface without any buffer layer is successfully fabricated at room temperature via surface activated bonding (SAB). The residual stress states and interfacial microstructures of GaN/Si heterostructures were systematically investigated through micro-Raman spectroscopy and transmission electron microscopy. Compared to the large compressive stress that existed in GaN layers grown-on-Si by MOCVD, a significantly relaxed and uniform small tensile stress was observed in GaN layers bonded-to-Si by SAB; this is mainly ascribed to the amorphous layer formed at the bonding interface. In addition, the interfacial microstructure and stress states of bonded GaN/Si heterointerfaces was found can be significantly tuned by appropriate thermal annealing. This work moves an important step forward directly integrating GaN to the present Si CMOS technology with high quality thin interfaces, and brings great promises for wafer-scale low-cost fabrication of GaN electronics.