Scheme for parity-controlled multi-qubit gates with superconducting qubits

TL;DR

This paper introduces a superconducting circuit device capable of directly implementing multi-qubit parity-controlled gates, enabling faster and more efficient quantum error correction with high fidelity.

Contribution

It proposes a novel superconducting circuit design that natively supports multi-qubit parity-controlled gates, reducing complexity in quantum error correction protocols.

Findings

Four-qubit PCGs performed in 30 ns

Process fidelity exceeds 99%

Robust against parameter disorder and spurious couplings

Abstract

Multi-qubit parity measurements are at the core of many quantum error correction schemes. Extracting multi-qubit parity information typically involves using a sequence of multiple two-qubit gates. In this paper, we propose a superconducting circuit device with native support for multi-qubit parity-controlled gates (PCG). These are gates that perform rotations on a parity ancilla based on the multi-qubit parity operator of adjacent qubits, and can be directly used to perform multi-qubit parity measurements. The circuit consists of a set of concatenated Josephson ring modulators and effectively realizes a set of transmon-like qubits with strong longitudinal nearest-neighbor couplings. PCGs are implemented by applying microwave drives to the parity ancilla at specific frequencies. We investigate the scheme's performance with numerical simulation using realistic parameter choices and decoherence rates, and find that the device can perform four-qubit PCGs in 30 ns with process fidelity surpassing 99%. Furthermore, we study the effects of parameter disorder and spurious coupling between next-nearest neighboring qubits. Our results indicate that this approach to realizing PCGs constitute an interesting candidate for near-term quantum error correction experiments.