Machine Learning Accelerators in 2.5D Chiplet Platforms with Silicon Photonics

TL;DR

This paper explores integrating optical computation and communication into 2.5D chiplet platforms to create scalable, energy-efficient ML accelerators that overcome the limitations of traditional electronic chips.

Contribution

It introduces a novel approach combining photonics with 2.5D chiplet architectures for advanced ML hardware acceleration.

Findings

Optical integration can enhance interconnect speed and energy efficiency.

Photonic chiplet platforms enable scalable ML acceleration.

Cross-layer design optimizes photonic and electronic components.

Abstract

Domain-specific machine learning (ML) accelerators such as Google's TPU and Apple's Neural Engine now dominate CPUs and GPUs for energy-efficient ML processing. However, the evolution of electronic accelerators is facing fundamental limits due to the limited computation density of monolithic processing chips and the reliance on slow metallic interconnects. In this paper, we present a vision of how optical computation and communication can be integrated into 2.5D chiplet platforms to drive an entirely new class of sustainable and scalable ML hardware accelerators. We describe how cross-layer design and fabrication of optical devices, circuits, and architectures, and hardware/software codesign can help design efficient photonics-based 2.5D chiplet platforms to accelerate emerging ML workloads.