Design of an FPGA-based USB 3.0 device controller

TL;DR

This paper presents an FPGA-based USB 3.0 device controller that integrates PHY and controller functions within the FPGA, achieving high transfer speeds with minimal resource usage.

Contribution

It introduces a novel FPGA implementation of a USB 3.0 controller using internal transceivers as PHY, eliminating external chips and optimizing resource utilization.

Findings

Achieved over 320 MB/s transfer speed.

Used only 4.59% of FPGA slices in Kintex-7 325t.

Successfully integrated PHY and controller in FPGA.

Abstract

The traditional USB 3.0 communication based on FPGA uses an external chip as a USB PHY or a USB controller including a USB PHY. This paper realizes a USB 3.0 controller by using FPGA resources, in which FPGA logic realizes a serial interface engine, and an FPGA internal transceiver is as a USB PHY. Used slices percent after implementation is 4.59% in Kintex-7 325t. The test result shows that the speed of USB 3.0 is more than 320 MB/s bulk-in and bulk-out transfers.