Fast Merge Tree Computation via SYCL

TL;DR

This paper presents a portable, GPU-accelerated implementation of merge tree computation using SYCL, enabling efficient topological data analysis across various hardware platforms.

Contribution

It adapts the triplet merge tree algorithm to SYCL, providing a cross-platform, parallel implementation and compares it with existing GPU solutions.

Findings

SYCL implementation achieves competitive performance

Enables merge tree computation on multiple hardware backends

Improves portability of topological data analysis tools

Abstract

A merge tree is a topological descriptor of a real-valued function. Merge trees are used in visualization and topological data analysis, either directly or as a means to another end: computing a 0-dimensional persistence diagram, identifying connected components, performing topological simplification, etc. Scientific computing relies more and more on GPUs to achieve fast, scalable computation. For efficiency, data analysis should take place at the same location as the main computation, which motivates interest in parallel algorithms and portable software for merge trees that can run not only on a CPU, but also on a GPU, or other types of accelerators. The SYCL standard defines a programming model that allows the same code, written in standard C++, to compile targets for multiple parallel backends (CPUs via OpenMP or TBB, NVIDIA GPUs via CUDA, AMD GPUs via ROCm, Intel GPUs via Level Zero, FPGAs). In this paper, we adapt the triplet merge tree algorithm to SYCL and compare our implementation with the VTK-m implementation, which is the only other implementation of merge trees for GPUs that we know of.