PWB Manufacturing Variability Effects on High Speed SerDes Links: Statistical Insights from Thousands of 4-Port SParameter Measurements

TL;DR

This paper analyzes manufacturing variability in high-speed SerDes links using extensive S-parameter measurements, providing statistical insights to improve design accuracy and reduce costs.

Contribution

It introduces statistical techniques for large-sample variability estimation in PWB SI performance, based on a dataset of nearly 12,000 measurements.

Findings

Variability significantly impacts SI performance metrics.

Large sample sizes improve accuracy of variability estimates.

Design criteria may be misestimated without proper variability analysis.

Abstract

Variability analysis is important in successfully deploying multi-gigabit backplane printed wiring boards (PWBs) with growing numbers of high-speed SerDes links. We discuss the need for large sample sizes to obtain accurate variability estimates of SI metrics (eye height, phase skew, etc). Using a dataset of 11,961 S-parameters, we demonstrate statistical techniques to extract accurate estimates of PWB SI performance variations. We cite numerical examples illustrating how these variations may contribute to underestimated or overestimated design criteria, causing unnecessary design expense. Tabular summaries of performance variation and key findings of broad interest to the general SI community are highlighted.