Task-based preemptive scheduling on FPGAs leveraging partial reconfiguration

TL;DR

This paper introduces a task-based preemptive scheduling framework for FPGAs that uses partial reconfiguration to efficiently run multiple kernels concurrently with minimal overhead.

Contribution

It presents a novel programming abstraction leveraging partial reconfiguration, enabling preemptive multitasking on FPGAs with a simple interface.

Findings

10% overhead in worst-case reconfiguration

24% performance improvement over full reconfiguration

Supports concurrent execution of diverse kernels

Abstract

FPGAs are an attractive type of accelerator for all-purpose HPC computing systems due to the possibility of deploying tailored hardware on demand. However, the common tools for programming and operating FPGAs are still complex to use, especially in scenarios where diverse types of tasks should be dynamically executed. In this work we present a programming abstraction with a simple interface that internally leverages High-Level Synthesis, Dynamic Partial Reconfiguration and synchronisation mechanisms to use an FPGA as a multi-tasking server with preemptive scheduling and priority queues. This leads to an improved use of the FPGA resources, allowing the execution of several different kernels concurrently and deploying the most urgent ones as fast as possible. The results of our experimental study show that our approach incurs only a 10% overhead in the worst case when using two reconfigurable regions, whilst providing a significant performance improvement of at least 24% over the traditional full reconfiguration approach.