Spin-Orbit Torque Flash Analog-to-Digital Converter

TL;DR

This paper presents a novel 3-bit spin-CMOS flash ADC using in-plane-anisotropy magnetic tunnel junctions with spin-orbit torque, demonstrating a proof-of-concept that integrates spintronics into ADC design for potential low-power, compact applications.

Contribution

It introduces a new spintronic-based ADC architecture utilizing i-MTJs with SOT switching, replacing traditional comparators, and provides experimental and simulation results highlighting its capabilities and limitations.

Findings

Process variations limit ADC accuracy to 2 bits.

Maximum DNL is 0.739 LSB.

Maximum INL is 0.7319 LSB.

Abstract

Although Analog-to-digital converters (ADCs) are critical components in mixed-signal integrated circuits (IC), their performance has not been improved significantly over the last decade. To achieve a radical improvement (compact, low power and reliable ADCs), spintronics can be considered as a proper candidate due to its compatibility with CMOS and wide applications in storage, neuromorphic computing, and so on. In this paper, a proof-of-concept of a 3-bit spin-CMOS Flash ADC using in-plane-anisotropy magnetic tunnel junctions (i-MTJs) with spin-orbit torque (SOT) switching mechanism is designed, fabricated and characterized. The proposed ADC replaces the current mirrors and power-hungry comparators in the conventional Flash ADC with seven parallel i-MTJs with different heavy metal (HM) widths. Monte-Carlo simulations based on the experimental measurements show the process variations/mismatch limits the accuracy of the proposed ADC to 2 bits. Moreover, the maximum differential nonlinearity (DNL) and integral nonlinearity (INL) are 0.739 LSB (least significant bit) and 0.7319 LSB, respectively.