A Nanocryotron Memory and Logic Family

TL;DR

This paper introduces and experimentally demonstrates nanocryotron-based memory and logic building blocks, enabling scalable superconducting circuits with robust performance and magnetic field resilience.

Contribution

The work provides the first set of standard nanocryotron logic and memory cells, demonstrating their operation and potential for larger superconducting circuit integration.

Findings

Achieved 10^-4 bit error rate at 50 MHz

Demonstrated operation under 36 mT magnetic field

Built a delay flip-flop from two memory cells

Abstract

The development of superconducting electronics based on nanocryotrons has been limited so far to few-device circuits, in part due to the lack of standard and robust logic cells. Here, we introduce and experimentally demonstrate designs for a set of nanocryotron-based building blocks that can be configured and combined to implement memory and logic functions. The devices were fabricated by patterning a single superconducting layer of niobium nitride and measured in liquid helium on a wide range of operating points. The tests show $10^{-4}$ bit error rates with above $20\,\%$ margins up to $50\,$MHz and the possibility of operating under the effect of a perpendicular $36\,$mT magnetic field, with $30\,\%$ margins at $10\,$MHz. Additionally, we designed and measured an equivalent delay flip-flop made of two memory cells to show the possibility of combining multiple building blocks to make larger circuits. These blocks may constitute a solid foundation for the development of nanocryotron logic circuits and finite-state machines with potential applications in the integrated processing and control of superconducting nanowire single-photon detectors.