Tydi-lang: A Language for Typed Streaming Hardware

TL;DR

Tydi-lang is a new language that uses the Tydi specification to simplify the design of hardware protocols for typed streaming data, improving abstraction and reducing development effort.

Contribution

It introduces Tydi-lang, a high-level language with templates and a compiler toolchain that automates translating typed streams into hardware descriptions.

Findings

Demonstrated translation of SQL to VHDL using Tydi-lang

Showed increased abstraction and reduced design effort

Implemented open-source compiler toolchain

Abstract

Transferring composite data structures with variable-length fields often requires designing unique protocols, causing incompatibility issues and decreased collaboration among hardware developers, especially in the open-source community. Because the high-level meaning of a protocol is often lost in translation to low-level languages when a custom protocol needs to be designed, extra documentation is required, the interpretation of which introduces new opportunities for errors. The Tydi specification (Tydi-spec) was proposed to address the issues by codifying the complex structures in a type and providing a standard protocol to transfer typed data among components. This paper presents Tydi-lang, a language that incorporates Tydi-spec for describing typed streams and offers templates for reusable components. An open-source compiler from Tydi-lang to Tydi intermediate representation (Tydi-IR) is implemented, and a Tydi-IR to VHDL compiler is utilized. Through Tydi-lang examples translating high-level SQL to VHDL, we demonstrate its efficiency in raising abstraction levels and reducing design effort.