Mining CryptoNight-Haven on the Varium C1100 Blockchain Accelerator Card

TL;DR

This paper introduces the first hardware accelerator for CryptoNight-Haven on the Xilinx Varium C1100, aiming to improve mining throughput and energy efficiency compared to CPU and GPU solutions.

Contribution

It presents a novel coprocessor design for CryptoNight-Haven, utilizing pipelined computation and HBM on an FPGA-based blockchain accelerator card.

Findings

Increased hash computation throughput

Enhanced energy efficiency over CPU and GPU miners

Successful implementation of a pipelined FPGA-based accelerator

Abstract

Cryptocurrency mining is an energy-intensive process that presents a prime candidate for hardware acceleration. This work-in-progress presents the first coprocessor design for the ASIC-resistant CryptoNight-Haven Proof of Work (PoW) algorithm. We construct our hardware accelerator as a Xilinx Run Time (XRT) RTL kernel targeting the Xilinx Varium C1100 Blockchain Accelerator Card. The design employs deeply pipelined computation and High Bandwidth Memory (HBM) for the underlying scratchpad data. We aim to compare our accelerator to existing CPU and GPU miners to show increased throughput and energy efficiency of its hash computations