Enhanced intrinsic voltage gain in artificially stacked bilayer CVD graphene field effect transistors

TL;DR

This paper demonstrates that artificially stacked bilayer CVD graphene FETs exhibit enhanced voltage gain due to improved current saturation, attributed to increased charge carrier density and reduced saturation velocity.

Contribution

It introduces a novel fabrication of stacked bilayer graphene FETs with improved electrical performance and applies a physics-based model to explain the enhanced current saturation.

Findings

Enhanced intrinsic voltage gain compared to monolayer graphene FETs

Reduced minimum output conductance in stacked bilayer devices

Improved current saturation linked to increased charge carrier density

Abstract

We report on electronic transport in dual-gate, artificially stacked bilayer graphene field effect transistors (BiGFETs) fabricated from large-area chemical vapor deposited (CVD) graphene. The devices show enhanced tendency to current saturation, which leads to reduced minimum output conductance values. This results in improved intrinsic voltage gain of the devices when compared to monolayer graphene FETs. We employ a physics based compact model originally developed for Bernal stacked bilayer graphene FETs (BSBGFETs) to explore the observed phenomenon. The improvement in current saturation may be attributed to increased charge carrier density in the channel and thus reduced saturation velocity due to carrier-carrier scattering.