An Accurate Hybrid Delay Model for Multi-Input Gates
Arman Ferdowsi, Ulrich Schmid, Josef Salzmann

TL;DR
This paper introduces a hybrid delay model for multi-input CMOS gates that accurately captures multi-input switching effects, enabling faster and more precise digital timing analysis compared to existing models.
Contribution
The paper develops an analytic hybrid delay model using time-variant resistors, providing explicit formulas for MIS effects in multi-input gates, and demonstrates improved accuracy over existing models.
Findings
The model accurately represents MIS effects in NOR and Muller C gates.
Analytic solutions enable fast digital timing simulations.
The model outperforms existing digital delay models in accuracy.
Abstract
In order to facilitate the analysis of timing relations between individual transitions in a signal trace, dynamic digital timing analysis offers a less accurate but much faster alternative to analog simulations of digital circuits. This primarily requires gate delay models that also account for the fact that the input-to-output delay of a particular input transition also depends on the temporal distance to the previous output transitions. In the case of multi-input gates, the delay also experiences variations caused by multi-input switching (MIS) effects, i.e., transitions at different inputs that occur in close temporal proximity. In this paper, we advocate the development of hybrid delay models for CMOS gates obtained by replacing transistors with time-variant resistors. We exemplify our approach by applying it to a NOR gate (and, hence, to the dual NAND gate) and a Muller C gate. We…
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Taxonomy
TopicsLow-power high-performance VLSI design · Advancements in PLL and VCO Technologies · Semiconductor materials and devices
