A study and comparison of COordinate Rotation DIgital Computer (CORDIC) architectures

TL;DR

This paper reviews various CORDIC architectures, highlighting their principles, applications, and trade-offs, to aid in selecting suitable designs for different signal processing needs.

Contribution

It provides a comprehensive comparison of existing CORDIC architectures, emphasizing their design goals and suitability for diverse applications.

Findings

Different CORDIC designs optimized for accuracy, area, latency, power, and reconfigurability.

Comparison of architectures based on performance and application domain.

Guidelines for selecting appropriate CORDIC architecture for specific requirements.

Abstract

Most of the digital signal processing applications performs operations like multiplication, addition, square-root calculation, solving linear equations etc. The physical implementation of these operations consumes a lot of hardware and, software implementation consumes large memory. Even if they are implemented in hardware, they do not provide high speed, and due to this reason, even today the software implementation dominates hardware. For realizing operations from basic to very complex ones with less hardware, a Co-ordinate Rotation Digital Computer (CORDIC) proves beneficial. It is capable of performing mathematical operations right from addition to highly complex functions with the help of arithmetic unit and shifters only. This paper gives a brief overview of various existing CORDIC architectures, their working principle, application domain and a comparison of these architectures. Different designs are available as per the target, i.e. high accuracy and precision, low area, low latency, hardware efficient, low power, reconfigurability, etc. that can be used as per the application in which the architecture needs to be employed.