Chiral Spin Textures for Next-Generation Memory and Unconventional Computing

TL;DR

This paper reviews the development, control, and application of chiral spin textures like skyrmions and domain walls for energy-efficient, scalable memory and unconventional computing devices, highlighting recent techniques and future opportunities.

Contribution

It provides a comprehensive overview of the progress, techniques, and challenges in engineering chiral spin textures for next-generation nanoelectronics and neuromorphic computing.

Findings

Analysis of energy landscapes for spin texture stability

Response of spin textures to geometric and thermal factors

Potential of chiral spin textures in memory and neuromorphic devices

Abstract

The realization of chiral spin textures - comprising myriad distinct, nanoscale arrangements of spins with topological properties - has established pathways for engineering robust, energy-efficient and scalable elements for non-volatile nanoelectronics. Particularly, current-induced manipulation of spin textures in nanowire racetracks and tunnel junction based devices are actively investigated for applications in memory, logic and unconventional computing. In this article, we paint a background on the progress of spin textures, as well as the relevant state-of-the-art techniques used for their development. In particular, we clarify the competing energy landscape of chiral spin textures, such as skyrmions and chiral domain walls, to tune their size, density and zero-field stability. Next, we discuss the spin texture phenomenology and their response to extrinsic factors arising from geometric constraints, inter-wire interactions and thermal-electrical effects. Finally, we reveal promising chiral spintronic memory and neuromorphic devices, and discuss emerging material and device engineering opportunities.