Improving Energy Efficiency of Permissioned Blockchains Using FPGAs

TL;DR

This paper empirically evaluates and enhances the energy efficiency of Hyperledger Fabric validator peers by integrating FPGA accelerators, achieving a tenfold improvement in throughput per energy unit.

Contribution

It introduces a methodology to measure energy consumption and demonstrates a significant energy efficiency improvement using FPGA-based accelerators in permissioned blockchains.

Findings

Energy efficiency improved by 10x with FPGA acceleration.

Validator peer achieves 23,000 tx/s at 118W power.

Software and FPGA optimizations significantly enhance performance.

Abstract

Permissioned blockchains like Hyperledger Fabric have become quite popular for implementation of enterprise applications. Recent research has mainly focused on improving performance of permissioned blockchains without any consideration of their power/energy consumption. In this paper, we conduct a comprehensive empirical study to understand energy efficiency (throughput/energy) of validator peer in Hyperledger Fabric (a major bottleneck node). We pick a number of optimizations for validator peer from literature (allocated CPUs, software block cache and FPGA based accelerator). First, we propose a methodology to measure power/energy consumption of the two resulting compute platforms (CPU-only and CPU+FPGA). Then, we use our methodology to evaluate energy efficiency of a diverse set of validator peer configurations, and present many useful insights. With careful selection of software optimizations and FPGA accelerator configuration, we improved energy efficiency of validator peer by 10$\times$ compared to vanilla validator peer (i.e., energy-aware provisioning of validator peer can deliver 10$\times$ more throughput while consuming the same amount of energy). In absolute terms, this means 23,000 tx/s with power consumption of 118W from a validator peer using software block cache running on a 4-core server with AMD/Xilinx Alveo U250 FPGA card.