Classical Half-Adder using Trapped-ion Quantum Bits: Towards Energy-efficient Computation

TL;DR

This paper demonstrates classical logic gates, specifically a half-adder, implemented on trapped-ion quantum hardware, analyzing their energy efficiency and potential for future low-power classical computation.

Contribution

It provides the first experimental realization of classical logic gates on quantum hardware and analyzes their energy consumption, highlighting pathways for energy-efficient computing.

Findings

Successful implementation of a half-adder on trapped-ion quantum bits

Theoretical and experimental energy analysis of quantum logic gates

Identification of bottlenecks and future improvements for energy-efficient platforms

Abstract

Reversible computation has been proposed as a future paradigm for energy efficient computation, but so far few implementations have been realised in practice. Quantum circuits, running on quantum computers, are one construct known to be reversible. In this work, we provide a proof-of-principle of classical logical gates running on quantum technologies. In particular, we propose, and realise experimentally, Toffoli and Half-Adder circuits suitable for classical computation, using radiofrequency-controlled $^{171}$Yb$^+$ ions in a macroscopic linear Paul-trap as qubits. We analyse the energy required to operate the logic gates, both theoretically and experimentally, with a focus on the control energy. We identify bottlenecks and possible improvements in future platforms for energetically-efficient computation, e.g., trap chips with integrated antennas and cavity QED. Our experimentally verified energetic model also fills a gap in the literature of the energetics of quantum information, and outlines the path for its detailed study, as well as its potential applications to classical computing.