An Efficient FPGA Accelerator for Point Cloud
Zilun Wang, Wendong Mao, Peixiang Yang, Zhongfeng Wang, and Jun Lin

TL;DR
This paper presents a high-performance FPGA accelerator for submanifold sparse convolutional networks in point cloud processing, significantly enhancing efficiency and power savings over GPU implementations.
Contribution
The paper introduces a novel FPGA-based accelerator with zero removing, encoding schemes, and specialized hardware to efficiently handle sparse point cloud data in SSCN.
Findings
Drastically improved computational efficiency.
Power efficiency increased by 51 times compared to GPU.
Effective handling of unstructured sparsity in point cloud data.
Abstract
Deep learning-based point cloud processing plays an important role in various vision tasks, such as autonomous driving, virtual reality (VR), and augmented reality (AR). The submanifold sparse convolutional network (SSCN) has been widely used for the point cloud due to its unique advantages in terms of visual results. However, existing convolutional neural network accelerators suffer from non-trivial performance degradation when employed to accelerate SSCN because of the extreme and unstructured sparsity, and the complex computational dependency between the sparsity of the central activation and the neighborhood ones. In this paper, we propose a high performance FPGA-based accelerator for SSCN. Firstly, we develop a zero removing strategy to remove the coarse-grained redundant regions, thus significantly improving computational efficiency. Secondly, we propose a concise encoding scheme…
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Taxonomy
Topics3D Shape Modeling and Analysis · Optical measurement and interference techniques · Advanced Vision and Imaging
Methods*Communicated@Fast*How Do I Communicate to Expedia? · Max Pooling · Concatenated Skip Connection · Convolution · U-Net
