Disturbance Observer Application for the Compensation of the Phase Drift of the LANSCE DTL LINAC Solid State Power Amplifier

TL;DR

This paper presents a disturbance observer controller (DOBC) implemented on FPGA to mitigate phase drift caused by temperature-dependent variations in the solid-state power amplifier of the LANSCE DTL LINAC, improving cavity field stability.

Contribution

The paper introduces a novel FPGA-based DOBC for the LANSCE DTL LINAC's SSPA, enhancing phase stability by compensating for temperature-induced phase variations.

Findings

Effective phase drift mitigation demonstrated

Improved cavity field stability over time

Short- and long-term performance validated

Abstract

The front end of Los Alamos Neutron Science Center (LANSCE) linear accelerator uses four 201.25-MHz Drift-Tube Linacs (DTLs) to accelerate the H+ and H- beams to 100 MeV. Three of the 201.25-MHz DTLs are powered by diacrodes and the first DTL is powered by a tetrode. A 20-kW solid-state power amplifier (SSPA) is used to provide ~15 kW drive power to the tetrode. The SSPA is water-cooled and consists of 24 push-pull LDMOS transistors operating at 45% of their power saturation capability, providing ample power headroom and excellent linearity. However, the phase of the SSPA is perturbed at +/-20 degrees over a few ten minutes partially caused by the temperature dependent phase variation of the air-cooled SSPA driver circulator. This phase variation consumes most of the phase control margin of the cavity field feedback controller. In order to mitigate the effect of the SSPA phase variation on the cavity field, a disturbance observer controller (DOBC) has been designed and implemented on the cavity field control FPGA, which functions in parallel with the cavity field feedback controller. In this paper, the DOBC design and its function as well as its short- and long-term performance are addressed.