Size optimization of CNOT circuits on NISQ

TL;DR

This paper presents new algorithms for optimizing CNOT circuits on NISQ devices, considering initial qubit distributions and improving circuit implementation efficiency.

Contribution

It introduces a two-step optimization approach, including a novel heuristic MILP-based routing algorithm, addressing both initial qubit placement and routing challenges.

Findings

Our algorithms outperform existing methods in experiments.

The approach effectively reduces circuit depth and gate count.

Results demonstrate improved fidelity on IBM20 and other NISQ devices.

Abstract

Quantum computers in practice today require strict memory constraints, where 2-qubit operations can only be performed between the qubits closest to each other in a graph structure. So a quantum circuit must undergo a transformation to the graph before it can be implemented. In this paper, we study the optimization of the CNOT circuits on some noisy intermediate-scale quantum(NISQ) devices. Compared with previous works, we decompose it into two sub-problems: optimization with a given initial qubit distribution and optimization without limitations of initial qubit distribution. We find that most of the previous researches focused on the first sub-problem, and ignored the influence of different distribution of qubits in the same topology structure on the optimization results. In this paper, We take both sub-problems into account and give some new optimization algorithms. In short, our method is divided into two steps: matrix optimization and routing optimization. We implement matrix optimization with the algorithm in [XZL+20] and put forward a new heuristic algorithm with MILP method which can solve the second step. We implement our algorithm on IBM20 and some other NISQ devices, the results are better than most other methods in our experiment.