An Improved PMOS-Based Low Dropout Regulator Design for Large Loads
Arijit Saha, Ayan Biswas, Supriya Dhabal, Palaniandavar Venkateswaran

TL;DR
This paper presents an improved PMOS-based low dropout regulator design that enhances stability and current capacity, suitable for large load applications, without needing additional charge pumps.
Contribution
The paper introduces a novel PMOS LDO topology with parallel pass elements and Miller capacitance for improved stability and higher load current handling.
Findings
Enhanced stability with Miller capacitance.
Increased load current capacity through parallel pass elements.
No need for additional charge pumps in PMOS design.
Abstract
A stable low dropout (LDO) voltage regulator topology is presented in this paper. LDOs are linear voltage regulators that do not produce ripples in the DC voltage. Despite the close proximity of the supply input voltage to the output, this regulator will maintain the desired output voltage. Based on a detailed comparison between NMOS and PMOS-based LDOs, we decided to opt for a PMOS design because it does not require an additional charge pump as compared to NMOS. A demonstration of how Miller capacitance enhances overall design stability is also presented here. Multiple pass elements are arranged in parallel in order to increase the current carrying capacity of the pass network.
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Taxonomy
TopicsLow-power high-performance VLSI design · Radiation Effects in Electronics · Advancements in Semiconductor Devices and Circuit Design
