Exploiting Nanoelectronic Properties of Memory Chips for Prevention of IC Counterfeiting

TL;DR

This paper introduces a machine learning-based methodology that exploits nanoelectronic properties of memory chips to detect counterfeit, recycled, and used ICs by analyzing latency and variability signatures, achieving high accuracy.

Contribution

It presents a novel, low-cycle pre-conditioning technique combined with ML algorithms to identify IC origin, reuse, and usage history across multiple NVM technologies.

Findings

Achieved 95.1% accuracy in identifying IC manufacturers.

Demonstrated detection of recycled and used NVM chips.

Analyzed latency trends across different NVM technologies.

Abstract

This study presents a methodology for anticounterfeiting of Non-Volatile Memory (NVM) chips. In particular, we experimentally demonstrate a generalized methodology for detecting (i) Integrated Circuit (IC) origin, (ii) recycled or used NVM chips, and (iii) identification of used locations (addresses) in the chip. Our proposed methodology inspects latency and variability signatures of Commercial-Off-The-Shelf (COTS) NVM chips. The proposed technique requires low-cycle (~100) pre-conditioning and utilizes Machine Learning (ML) algorithms. We observe different trends in evolution of latency (sector erase or page write) with cycling on different NVM technologies from different vendors. ML assisted approach is utilized for detecting IC manufacturers with 95.1 % accuracy obtained on prepared test dataset consisting of 3 different NVM technologies including 6 different manufacturers (9 types of chips).