At-the-edge Data Processing for Low Latency High Throughput Machine Learning Algorithms

TL;DR

This paper explores low latency, high throughput data processing techniques for real-time machine learning applications at the edge, focusing on FPGA implementation of fast featurization algorithms for streaming data in scientific and control systems.

Contribution

It introduces a discrete cosine and sine transform-based approach for fast data featurization suitable for FPGA hardware in edge machine learning applications.

Findings

Featurization algorithms optimized for FPGA implementation.

Alignment with inference accelerators for edge computing.

Application to real-world scientific and control systems.

Abstract

High throughput and low latency data processing is essential for systems requiring live decision making, control, and machine learning-optimized data reduction. We focus on two distinct use cases for in-flight streaming data processing for a) X-ray pulse reconstruction at SLAC's LCLS-II Free-Electron Laser and b) control diagnostics at the DIII-D tokamak fusion reactor. Both cases exemplify high throughput and low latency control feedback and motivate our focus on machine learning at the edge where data processing and machine learning algorithms can be implemented in field programmable gate array based hardware immediately after the diagnostic sensors. We present our recent work on a data preprocessing chain which requires fast featurization for information encoding. We discuss several options for such algorithms with the primary focus on our discrete cosine and sine transform-based approach adapted for streaming data. These algorithms are primarily aimed at implementation in field programmable gate arrays, favoring linear algebra operations that are also aligned with the recent advances in inference accelerators for the computational edge.