Compact modeling technology for the simulation of integrated circuits based on graphene field-effect transistors

TL;DR

This paper presents a modular compact modeling framework for graphene FETs that accurately simulates their electrical behavior in integrated circuits, including non-idealities and dynamic effects, validated against experimental data.

Contribution

It introduces a comprehensive set of primary and secondary models for GFETs, enabling detailed simulation of their static and dynamic responses in circuits.

Findings

Models match experimental data under various conditions

Inclusion of non-idealities improves simulation accuracy

Framework supports scalable and collaborative development

Abstract

In this study, we report the progress made towards the definition of a modular compact modeling technology for graphene field-effect transistors (GFET) that enables the electrical analysis of arbitrary GFET-based integrated circuits. A set of primary models embracing the main physical principles defines the ideal GFET response under DC, transient (time domain), AC (frequency domain), and noise (frequency domain) analysis. Other set of secondary models accounts for the GFET non-idealities, such as extrinsic-, short-channel-, trapping/detrapping-, self-heating-, and non-quasi static-effects, which could have a significant impact under static and/or dynamic operation. At both device and circuit levels, significant consistency is demonstrated between the simulation output and experimental data for relevant operating conditions. Additionally, we provide a perspective of the challenges during the scale up of the GFET modeling technology towards higher technology readiness levels while drawing a collaborative scenario among fabrication technology groups, modeling groups, and circuit designers.