Characterizing Qubit Traffic of a Quantum Intranet aiming at Modular Quantum Computers

TL;DR

This paper introduces a technique for analyzing qubit traffic in multi-chip quantum computers to optimize architecture design and interconnects, focusing on inter-core communication and intra-core operations.

Contribution

It presents a novel spatio-temporal characterization method for quantum circuits in multi-core quantum processors, aiding design space exploration.

Findings

Identifies key qubit traffic patterns across chips.

Highlights the impact of intra-core operations on communication.

Provides benchmarks demonstrating analysis effectiveness.

Abstract

Quantum many-core processors are envisioned as the ultimate solution for the scalability of quantum computers. Based upon Noisy Intermediate-Scale Quantum (NISQ) chips interconnected in a sort of quantum intranet, they enable large algorithms to be executed on current and close future technology. In order to optimize such architectures, it is crucial to develop tools that allow specific design space explorations. To this aim, in this paper we present a technique to perform a spatio-temporal characterization of quantum circuits running in multi-chip quantum computers. Specifically, we focus on the analysis of the qubit traffic resulting from operations that involve qubits residing in different cores, and hence quantum communication across chips, while also giving importance to the amount of intra-core operations that occur in between those communications. Using specific multi-core performance metrics and a complete set of benchmarks, our analysis showcases the opportunities that the proposed approach may provide to guide the design of multi-core quantum computers and their interconnects.