Universal Address Sequence Generator for Memory Built-in Self-test

TL;DR

This paper introduces a universal address sequence generator (UASG) for memory self-testing, capable of producing various address sequences with desired properties, enhancing test coverage and efficiency.

Contribution

The paper proposes a novel universal method and hardware implementation for generating diverse address sequences for memory testing, including standard and pseudorandom sequences.

Findings

UASG can generate multiple address sequence types.

Hardware implementation details are provided and evaluated.

Practical tests demonstrate the generator's effectiveness.

Abstract

This paper presents the universal address sequence generator (UASG) for memory built-in-self-test. The studies are based on the proposed universal method for generating address sequences with the desired properties for multirun march memory tests. As a mathematical model, a modification of the recursive relation for quasi-random sequence generation is used. For this model, a structural diagram of the hardware implementation is given, of which the basis is a storage device for storing so-called direction numbers of the generation matrix. The form of the generation matrix determines the basic properties of the generated address sequences. The proposed UASG generates a wide spectrum of different address sequences, including the standard ones, such as linear, address complement, gray code, worst-case gate delay, $2^i$, next address, and pseudorandom. Examples of the use of the proposed methods are considered. The result of the practical implementation of the UASG is presented, and the main characteristics are evaluated.