Novel Strategy Generating Variable-length State Machine Test Paths
Vaclav Rechtberger, Miroslav Bures, Bestoun S. Ahmed, Hynek, Schvach

TL;DR
This paper introduces a novel strategy for generating variable-length test paths in finite state machines, enabling start/end state control and improving defect detection efficiency over existing methods.
Contribution
The paper presents a new test path generation strategy supporting start/end states and length constraints, with algorithms and models outperforming existing approaches in test set reduction and defect detection.
Findings
Outperforms existing methods in reducing test steps.
Detects up to 30% more defects per test step.
Effective for industrial and artificial models.
Abstract
Finite State Machine is a popular modeling notation for various systems, especially software and electronic. Test paths can be automatically generated from the system model to test such systems using a suitable algorithm. This paper presents a strategy that generates test paths and allows to start and end test paths only in defined states of the finite state machine. The strategy also simultaneously supports generating test paths only of length in a given range. For this purpose, alternative system models, test coverage criteria, and a set of algorithms are developed. The strategy is compared with the best alternative based on the reduction of the test set generated by the established N-switch coverage approach on a mix of 171 industrial and artificially generated problem instances. The proposed strategy outperforms the compared variant in a smaller number of test path steps. The extent…
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Taxonomy
TopicsSoftware Testing and Debugging Techniques · VLSI and Analog Circuit Testing · VLSI and FPGA Design Techniques
