Development of TRL5 Space Qualified Hardware for Tuning, Biasing, and Readout of Kilopixel TES Bolometer Arrays

TL;DR

This paper presents TRL5 space-qualified electronics for biasing and reading out large TES bolometer arrays in space telescopes, enabling scalable detector readout with optimized power, thermal, and reliability features.

Contribution

Introduction of TRL5 electronics for TES bolometer readout using dfmux techniques, suitable for space-based mm-wave telescopes like LiteBIRD.

Findings

Electronics meet TRL5 space qualification standards.

Performance measurements show acceptable power and thermal profiles.

Design ensures reliability and scalability for large detector arrays.

Abstract

The next generation of space-based mm-wave telescopes, such as JAXA's LiteBIRD mission, require focal planes with thousands of detectors in order to achieve their science goals. Digital frequency-domain multiplexing (dfmux) techniques allow detector counts to scale without a linear growth in wire harnessing, sub-Kelvin refrigerator loads, and other scaling problems. In this paper, we introduce Technology Readiness Level 5 (TRL5) electronics suitable for biasing and readout of LiteBIRD's Transition Edge Sensor (TES) bolometers using dfmux techniques. These electronics sit between the spacecraft's payload computer and the cryogenic focal plane, and provide detector biasing, tuning, and readout interfaces between these detectors and the spacecraft's on-board storage. We describe the overall architecture of the electronics, including functional decomposition into modules, the numerology and interconnection of these modules, and their internal and external interfaces. We describe performance measurements to date, including power consumption, thermal performance, and mass, volume, and reliability estimates. This paper is a companion piece to a description of the electronics' on-board Field-Programmable Gate Array (FPGA) firmware.