High-Level Approaches to Hardware Security: A Tutorial

TL;DR

This tutorial introduces hardware security challenges in IC design, illustrating key problems like side-channel attacks and logic locking through practical examples, and discusses open resources for further learning.

Contribution

It provides an accessible overview of hardware security issues with detailed examples and open resources, aiding newcomers in understanding and addressing security vulnerabilities in ICs.

Findings

Demonstrates how scan chain-based side channel attacks compromise security

Explains logic locking techniques to protect digital designs

Provides open access resources for further study

Abstract

Designers use third-party intellectual property (IP) cores and outsource various steps in the integrated circuit (IC) design and manufacturing flow. As a result, security vulnerabilities have been rising. This is forcing IC designers and end users to re-evaluate their trust in ICs. If attackers get hold of an unprotected IC, they can reverse engineer the IC and pirate the IP. Similarly, if attackers get hold of a design, they can insert malicious circuits or take advantage of "backdoors" in a design. Unintended design bugs can also result in security weaknesses. This tutorial paper provides an introduction to the domain of hardware security through two pedagogical examples of hardware security problems. The first is a walk-through of the scan chain-based side channel attack. The second is a walk-through of logic locking of digital designs. The tutorial material is accompanied by open access digital resources that are linked in this article.