MAC-DO: An Efficient Output-Stationary GEMM Accelerator for CNNs Using DRAM Technology
Minki Jeong, Wanyeong Jung

TL;DR
MAC-DO is a novel DRAM-based in-situ accelerator that supports multi-bit MAC operations within a single cycle, significantly improving throughput and energy efficiency for CNN matrix multiplications by leveraging charge steering and output stationary mapping.
Contribution
It introduces a new MAC-DO cell design supporting multi-bit MAC operations in one cycle and a novel analog computation method, enhancing DRAM-based accelerator performance for neural networks.
Findings
Supports multi-bit MAC in a single cycle
Improves throughput and energy efficiency
Minimizes data movement in DNN computations
Abstract
DRAM-based in-situ accelerators have shown their potential in addressing the memory wall challenge of the traditional von Neumann architecture. Such accelerators exploit charge sharing or logic circuits for simple logic operations at the DRAM subarray level. However, their throughput is limited due to low array utilization, as only a few row cells in a DRAM array participate in operations while most rows remain deactivated. Moreover, they require many cycles for more complex operations such as a multi-bit multiply-accumulate (MAC) operation, resulting in significant data access and movement and potentially worsening power efficiency. To overcome these limitations, this paper presents MAC-DO, an efficient and low-power DRAM-based in-situ accelerator. Compared to previous DRAM-based in-situ accelerators, a MAC-DO cell, consisting of two 1T1C DRAM cells (two transistors and two…
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Taxonomy
TopicsAdvanced Memory and Neural Computing · Ferroelectric and Negative Capacitance Devices · Machine Learning and ELM
MethodsTest
