Hitless memory-reconfigurable photonic reservoir computing architecture

TL;DR

This paper introduces a novel photonic reservoir computing architecture with reconfigurable memory capacity, eliminating the need for signal attenuation, and demonstrating optimized performance on a temporal XOR task.

Contribution

It presents a new TDRC design using an asymmetric MZI in a resonant cavity that enables tunable memory capacity without optical attenuation.

Findings

Achieves hitless memory reconfiguration in photonic reservoir computing

Demonstrates optimized performance on temporal XOR task

Enables finding the optimal memory capacity for specific tasks

Abstract

Reservoir computing is an analog bio-inspired computation model for efficiently processing time-dependent signals, the photonic implementations of which promise a combination of massive parallel information processing, low power consumption, and high speed operation. However, most implementations, especially for the case of time-delay reservoir computing (TDRC), require signal attenuation in the reservoir to achieve the desired system dynamics for a specific task, often resulting in large amounts of power being coupled outside of the system. We propose a novel TDRC architecture based on an asymmetric Mach-Zehnder interferometer (MZI) integrated in a resonant cavity which allows the memory capacity of the system to be tuned without the need for an optical attenuator block. Furthermore, this can be leveraged to find the optimal value for the specific components of the total memory capacity metric. We demonstrate this approach on the temporal bitwise XOR task and conclude that this way of memory capacity reconfiguration allows optimal performance to be achieved for memory-specific tasks.