Accelerating CPU-Based Sparse General Matrix Multiplication With Binary Row Merging
Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Hongzhong Zheng,, Yuan Xie

TL;DR
This paper introduces BRMerge, a novel memory-efficient accumulation method for CPU-based sparse matrix multiplication, significantly improving performance by optimizing memory access patterns and reducing cache misses.
Contribution
The paper proposes BRMerge, a new accumulation method for SpGEMM that enhances memory access efficiency and outperforms existing libraries on standard benchmarks.
Findings
BRMerge achieves lower cache miss rates.
The new libraries outperform state-of-the-art methods.
Significant performance gains on multiple benchmarks.
Abstract
Sparse general matrix multiplication (SpGEMM) is a fundamental building block for many real-world applications. Since SpGEMM is a well-known memory-bounded application with vast and irregular memory accesses, considering the memory access efficiency is of critical importance for SpGEMM's performance. Yet, the existing methods put less consideration into the memory subsystem and achieved suboptimal performance. In this paper, we thoroughly analyze the memory access patterns of SpGEMM and their influences on the memory subsystem. Based on the analysis, we propose a novel and more efficient accumulation method named BRMerge for the multi-core CPU architectures. The BRMerge accumulation method follows the row-wise dataflow. It first accesses the matrix, generates the intermediate lists for one output row, and stores these intermediate lists in a consecutive memory space, which is…
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Taxonomy
TopicsAdvanced Data Storage Technologies · Parallel Computing and Optimization Techniques · Caching and Content Delivery
