A DSEL for High Throughput and Low Latency Software-Defined Radio on Multicore CPUs

TL;DR

This paper introduces a specialized embedded language for software-defined radio that efficiently exploits multicore CPU parallelism, enabling high throughput and low latency digital communication systems, exemplified by a DVB-S2 transceiver.

Contribution

The paper presents a novel DSEL that simplifies building efficient SDR systems by combining pipelining and sequence duplication for parallelism extraction on multicore CPUs.

Findings

Achieves high throughput and low latency in SDR on multicore CPUs

Successfully implements a DVB-S2 transceiver entirely in software

Demonstrates effective use of parallelism techniques in real-world SDR applications

Abstract

This article presents a new Domain Specific Embedded Language (DSEL) dedicated to Software-Defined Radio (SDR). From a set of carefully designed components, it enables to build efficient software digital communication systems, able to take advantage of the parallelism of modern processor architectures, in a straightforward and safe manner for the programmer. In particular, proposed DSEL enables the combination of pipelining and sequence duplication techniques to extract both temporal and spatial parallelism from digital communication systems. We leverage the DSEL capabilities on a real use case: a fully digital transceiver for the widely used DVB-S2 standard designed entirely in software. Through evaluation, we show how proposed software DVB-S2 transceiver is able to get the most from modern, high-end multicore CPU targets.