Low Power Neuromorphic EMG Gesture Classification

TL;DR

This paper demonstrates a low-power, high-accuracy neuromorphic system for EMG gesture recognition using advanced recurrent spiking neural networks and specialized encoding, achieving state-of-the-art results and significant energy efficiency.

Contribution

It introduces a novel neuromorphic recurrent SNN with adaptive neurons, a new spike encoding scheme, and demonstrates implementation on Intel's Loihi chip with superior energy and latency performance.

Findings

Achieves 90% classification accuracy on EMG data.

Reduces neuron count by ~53% compared to prior art.

Provides ~983X energy and ~19X latency improvements over GPU.

Abstract

EMG (Electromyograph) signal based gesture recognition can prove vital for applications such as smart wearables and bio-medical neuro-prosthetic control. Spiking Neural Networks (SNNs) are promising for low-power, real-time EMG gesture recognition, owing to their inherent spike/event driven spatio-temporal dynamics. In literature, there are limited demonstrations of neuromorphic hardware implementation (at full chip/board/system scale) for EMG gesture classification. Moreover, most literature attempts exploit primitive SNNs based on LIF (Leaky Integrate and Fire) neurons. In this work, we address the aforementioned gaps with following key contributions: (1) Low-power, high accuracy demonstration of EMG-signal based gesture recognition using neuromorphic Recurrent Spiking Neural Networks (RSNN). In particular, we propose a multi-time scale recurrent neuromorphic system based on special double-exponential adaptive threshold (DEXAT) neurons. Our network achieves state-of-the-art classification accuracy (90%) while using ~53% lesser neurons than best reported prior art on Roshambo EMG dataset. (2) A new multi-channel spike encoder scheme for efficient processing of real-valued EMG data on neuromorphic systems. (3) Unique multi-compartment methodology to implement complex adaptive neurons on Intel's dedicated neuromorphic Loihi chip is shown. (4) RSNN implementation on Loihi (Nahuku 32) achieves significant energy/latency benefits of ~983X/19X compared to GPU for batch size as 50.