Thread and Data Mapping in Software Transactional Memory: An Overview

TL;DR

This paper surveys how thread and data mapping strategies in software transactional memory can leverage runtime information to optimize application performance amidst complex memory hierarchies.

Contribution

It provides a comprehensive overview of existing STM-based mapping techniques and discusses future research directions in this area.

Findings

Identifies challenges in thread and data mapping for STM.

Highlights opportunities for low-overhead, precise mapping strategies.

Discusses the impact of conflict detection and resolution on mapping.

Abstract

In current microarchitectures, due to the complex memory hierarchies and different latencies on memory accesses, thread and data mapping are important issues to improve application performance. Software transactional memory (STM) is an abstraction used for thread synchronization, replacing the use of locks in parallel programming. Regarding thread and data mapping, STM presents new challenges and mapping opportunities, since (1) STM can use different conflict detection and resolution strategies, making the behavior of the application less predictable and; (2) the STM runtime has precise information about shared data and the intensity with each thread accesses them. These unique characteristics provide many opportunities for low-overhead, but precise statistics to guide mapping strategies for STM applications. The main objective of this paper is to survey the existing work about thread and data mapping that uses solely information gathered from the STM runtime to guide thread and data mapping decisions. We also discuss future research directions within this research area.