Making Real Memristive Processing-in-Memory Faster and Reliable

TL;DR

This paper explores the design and optimization of memristive Memory Processing Units (mMPUs) to enhance speed and reliability in processing-in-memory architectures, addressing performance bottlenecks and device reliability issues.

Contribution

It introduces improvements to mMPU architecture and techniques to mitigate memristor reliability problems, advancing non-von Neumann computing paradigms.

Findings

Enhanced mMPU architectures accelerate applications.

Reliability of memristors can be improved within mMPU operations.

Performance and energy efficiency are significantly improved.

Abstract

Memristive technologies are attractive candidates to replace conventional memory technologies, and can also be used to perform logic and arithmetic operations using a technique called 'stateful logic.' Combining data storage and computation in the memory array enables a novel non-von Neumann architecture, where both the operations are performed within a memristive Memory Processing Unit (mMPU). The mMPU relies on adding computing capabilities to the memristive memory cells without changing the basic memory array structure. The use of an mMPU alleviates the primary restriction on performance and energy in a von Neumann machine, which is the data transfer between CPU and memory. Here, the various aspects of mMPU are discussed, including its architecture and implications on the computing system and software, as well as examining the microarchitectural aspects. We show how mMPU can be improved to accelerate different applications and how the poor reliability of memristors can be improved as part of the mMPU operation.