BASALISC: Programmable Hardware Accelerator for BGV Fully Homomorphic Encryption
Robin Geelen, Michiel Van Beirendonck, Hilder V. L. Pereira, Brian, Huffman, Tynan McAuley, Ben Selfridge, Daniel Wagner, Georgios Dimou, Ingrid, Verbauwhede, Frederik Vercauteren, David W. Archer

TL;DR
BASALISC is a novel hardware accelerator architecture designed to significantly speed up BGV scheme-based Fully Homomorphic Encryption computations, making FHE more practical for cloud applications.
Contribution
It introduces the first hardware implementation of BGV with fully-packed bootstrapping and a multi-layer memory hierarchy optimized for high-throughput FHE operations.
Findings
Achieves over 5,000x speedup compared to HElib
Supports 32 Tb/s radix-256 NTT computations without stalls
Demonstrates feasibility of 1 GHz ASIC implementation for FHE acceleration
Abstract
Fully Homomorphic Encryption (FHE) allows for secure computation on encrypted data. Unfortunately, huge memory size, computational cost and bandwidth requirements limit its practicality. We present BASALISC, an architecture family of hardware accelerators that aims to substantially accelerate FHE computations in the cloud. BASALISC is the first to implement the BGV scheme with fully-packed bootstrapping -- the noise removal capability necessary for arbitrary-depth computation. It supports a customized version of bootstrapping that can be instantiated with hardware multipliers optimized for area and power. BASALISC is a three-abstraction-layer RISC architecture, designed for a 1 GHz ASIC implementation and underway toward 150mm2 die tape-out in a 12nm GF process. BASALISC's four-layer memory hierarchy includes a two-dimensional conflict-free inner memory layer that enables 32 Tb/s…
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Taxonomy
TopicsCryptography and Data Security · Cryptographic Implementations and Security · Cryptography and Residue Arithmetic
