Demonstration of fully integrated parity-time-symmetric electronics

TL;DR

This paper demonstrates a fully integrated parity-time-symmetric electronic system using standard CMOS technology, enabling advanced microwave manipulation, broadband generation, and non-reciprocal transport with improved bandwidth and noise performance.

Contribution

It presents the first fully integrated CMOS implementation of PT-symmetry in electronics, overcoming low-frequency limitations and enabling scalable high-frequency applications.

Findings

2.1 times increased bandwidth in microwave generation

30% noise reduction compared to conventional systems

Large non-reciprocal microwave transport from 2.75 to 3.10 GHz

Abstract

Harnessing parity-time (PT) symmetry with balanced gain and loss profiles has created a variety of opportunities in electronics from wireless energy transfer to telemetry sensing and topological defect engineering. However, existing implementations often employ ad-hoc approaches at low operating frequencies and are unable to accommodate large-scale integration. Here, we report a fully integrated realization of PT-symmetry in a standard complementary metal-oxide-semiconductor technology. Our work demonstrates salient PT-symmetry features such as phase transition as well as the ability to manipulate broadband microwave generation and propagation beyond the limitations encountered by exiting schemes. The system shows 2.1 times bandwidth and 30 percentage noise reduction compared to conventional microwave generation in oscillatory mode and displays large non-reciprocal microwave transport from 2.75 to 3.10 gigahertz in non-oscillatory mode due to enhanced nonlinearities. This approach could enrich integrated circuit (IC) design methodology beyond well-established performance limits and enable the use of scalable IC technology to study topological effects in high-dimensional non-Hermitian systems.