500-period epitaxial Ge/Si0.18Ge0.82 multi-quantum wells on silicon

TL;DR

This paper demonstrates the successful epitaxial growth of 500-period Ge/Si0.18Ge0.82 multi-quantum wells on silicon, achieving high crystallinity and structural uniformity despite challenges from dislocation-induced cracks and layer tilt.

Contribution

It presents a strain-balanced growth process for thick Ge/SiGe superlattices with 500 periods on silicon, addressing lattice mismatch issues and analyzing defect impacts.

Findings

High-quality, 16 μm thick Ge/SiGe superlattices achieved

Dislocation pile-up causes surface cracks and layer tilt

Structural uniformity maintained despite defects

Abstract

Ge/SiGe multi-quantum well heterostructures are highly sought-after for silicon-integrated optoelectronic devices operating in the broad range of the electromagnetic spectrum covering infrared to terahertz wavelengths. However, the epitaxial growth of these heterostructures at a thickness of a few microns has been a challenging task due the lattice mismatch and its associated instabilities resulting from the formation of growth defects. To elucidates these limits, we outline herein a process for the strain-balanced growth on silicon of 11.1 nm/21.5 nm Ge/Si0.18Ge0.82 superlattices (SLs) with a total thickness of 16 {\mu}m corresponding to 500 periods. Composition, thickness, and interface width are preserved across the entire SL heterostructure, which is an indication of limited Si-Ge intermixing. High crystallinity and low defect density are obtained in the Ge/Si0.18Ge0.82 layers, however, the dislocation pile up at the interface with the growth substate induces micrometer-longs cracks on the surface. This eventually leads to significant layer tilt in the strain-balanced SL and in the formation of millimeter-long, free-standing flakes. These results confirm the local uniformity of structural properties and highlight the critical importance of threading dislocations in shaping the wafer-level stability of thick multi-quantum well heterostructures required to implement effective silicon-compatible Ge/SiGe photonic devices.