Codes for Preventing Zeros at Partially Defective Memory Positions

TL;DR

This paper develops error correction codes for partially defective non-volatile memories, ensuring data integrity despite wearout and random errors, by updating models and proposing a simple masking method with BCH codes.

Contribution

It introduces a new model for partially defective memory cells and a simple coding scheme that effectively masks defects while correcting random errors.

Findings

The probability of violating defect restrictions due to errors is significant.

Updated models ensure encoded vectors plus errors remain non-zero at defective positions.

A simple BCH-based masking scheme achieves comparable performance to complex existing methods.

Abstract

This work deals with error correction for non-volatile memories that are partially defective at some levels. Such memory cells can only store incomplete information since some of their levels cannot be utilized entirely due to, e.g., wearout. On top of that, this paper corrects random errors $t\geq 1$ that could happen among $u$ partially defective cells while preserving their constraints. First, we show that the probability of violating the partially defective cells' restriction due to random errors is not trivial. Next, we update the models in [1] such that the coefficients of the output encoded vector plus the error vector at the partially defective positions are non-zero. Lastly, we state a simple proposition (Proposition 3) for masking the partial defects using a code with a minimum distance $d$ such that $d\geq 2(u+t)+1$. "Masking" means selecting a word whose entries correspond to writable levels in the (partially) defective positions. A comparison shows that masking $u$ cells by this proposition for a particular BCH code is as effective as using the complicated coding scheme proven in [1, Theorem 1].