RobotCore: An Open Architecture for Hardware Acceleration in ROS 2

TL;DR

RobotCore is a versatile architecture that integrates hardware acceleration into ROS 2, supporting various hardware types and targets, enabling faster robotic computations with minimal effort and improved efficiency.

Contribution

This work introduces RobotCore, a target- and accelerator-agnostic architecture that simplifies deploying hardware acceleration in ROS 2 systems across diverse platforms.

Findings

Achieved a 24.42% speedup over CPU using FPGA acceleration.

Developed an intra-FPGA communication queue for faster data flow.

Demonstrated architecture's portability across hardware and platforms.

Abstract

Hardware acceleration can revolutionize robotics, enabling new applications by speeding up robot response times while remaining power-efficient. However, the diversity of acceleration options makes it difficult for roboticists to easily deploy accelerated systems without expertise in each specific hardware platform. In this work, we address this challenge with RobotCore, an architecture to integrate hardware acceleration in the widely-used ROS 2 robotics software framework. This architecture is target-agnostic (supports edge, workstation, data center, or cloud targets) and accelerator-agnostic (supports both FPGAs and GPUs). It builds on top of the common ROS 2 build system and tools and is easily portable across different research and commercial solutions through a new firmware layer. We also leverage the Linux Tracing Toolkit next generation (LTTng) for low-overhead real-time tracing and benchmarking. To demonstrate the acceleration enabled by this architecture, we use it to deploy a ROS 2 perception computational graph on a CPU and FPGA. We employ our integrated tracing and benchmarking to analyze bottlenecks, uncovering insights that guide us to improve FPGA communication efficiency. In particular, we design an intra-FPGA ROS 2 node communication queue to enable faster data flows, and use it in conjunction with FPGA-accelerated nodes to achieve a 24.42% speedup over a CPU.