3T-1R Analog Write and Digital Read of MRAM for RNG and Low Power Memory Application

TL;DR

This paper presents an integrated 30nm FinFET-MTJ system enabling low-voltage analog write and digital read operations for MRAM-based true random number generation, optimizing stochastic behavior for reliable RNG applications.

Contribution

It introduces a novel integration of MTJ with FinFET for efficient analog write and digital read, enhancing MRAM's suitability for RNG and low-power memory applications.

Findings

Successful integration of MTJ with 30nm FinFET for low-voltage operation.

Single-cycle detection of probabilistic MTJ states for RNG.

Operation robustness against temperature and material variations.

Abstract

This work represents integration of MTJ with 30nm FinFET for low voltage analog write operations and readout optimization for the p-bit or true random number generator (TRNG), where the induced p-bit, the probabilistic state of the magnetic tunnel junction (MTJ), is detected within only a single computational period. The period contains two sub-cycles: write and joined read & reset cycles. The operation with MTJ becomes stochastic, independent after calibrating at the desired working point against the factors, which can induce the signal deviations, e.g. temperature, material degradation or external magnetic field.