FPIRM: Floating-point Processing in Racetrack Memories

TL;DR

FPIRM introduces a Racetrack Memory-based compute-in-memory technique that accelerates CNN inference and training at the edge, reducing energy consumption and increasing throughput compared to FPGA implementations.

Contribution

This paper presents FPIRM, a novel Racetrack Memory-based CIM approach enabling efficient multi-operand computations for CNNs, supporting both integer and floating point arithmetic.

Findings

FPIRM reduces energy consumption by at least 27% compared to FPGA.

FPIRM increases throughput by at least 18% over FPGA.

FPIRM achieves 2× efficiency improvement during CNN training.

Abstract

Convolutional neural networks (CNN) have become a ubiquitous algorithm with growing applications in mobile and edge settings. We describe a compute-in-memory (CIM) technique called FPIRM using Racetrack Memory (RM) to accelerate CNNs for edge systems. Using transverse read, a technique that can determine the number of '1's multiple adjacent domains, FPIRM can efficiently implement multi-operand bulk-bitwise and addition computations, and two-operand multiplication. We discuss how FPIRM can implement both variable precision integer and floating point arithmetic. This allows both CNN inference and on-device training without expensive data movement to the cloud. Based on these functions we demonstrate implementation of several CNNs with back propagation using RM CIM and compare these to state-of-the-art implementations of CIM inference and training in Field-Programmable Gate Arrays. During training FPIRM improves by 2$\times$ the efficiency, by reducing the energy consumption by at least 27% and increasing the throughput by at least 18% against FPGA.